•   Phone: 998-006-1576   Email: savithagkc@gmail.com
    Designation : Assistant Professor
    Qualification : M.Tech
    Experience: 2 Years
    Birthdate: 25/06/1979
    Interests: image processing,digital circuits,vhdl,
    Address: shree krupa,1st main, R.V colony
      Tumkur-572103
  • Qualifications

     Course  Specialization  Board / University  Year
     M.Tech  Digital Electronics  SSAHE  2011
     B.E  Electronics and Communication  Bangalore University  2001
           


    Intelligibility prediction of speech using MFCC
    Published on 19/05/2015
    at


    Using MFCC, prediction of speech Intelligibility
    Published on 07/06/2015
    at ICETER-15


    A Comprenhensive Survey on Various Reversible Data Hiding Methods
    Published on 22/12/2016
    at 1st International conference on Recent Innovations in Engg. & Technology (ICRIEAT-2016)


    A Novel Approach for Implementation of AES Algorithm on NoC
    Published on 30/04/2015
    at EECCS-2015 Bangalor


    A survey on reconfigurable architecture for 1-D DWT
    Published on 05/05/2014
    at International journal of science & technology


    An Approach for Implementation of AES Algorithm on NoC
    Published on 06/05/2015
    at NCVCS15


    comprehensive survey on intelligibility prediction
    Published on 11/05/2015
    at NCVCS-15


    Design and implementation of an efficient reconfigurable architecture for 1-D and 2-D DWT on FPGA using pipelined architecture
    Published on 22/08/2014
    at National conference on VLSI,Signal and image processing


    Design of a reconfigurable architecture for 1-D DWT using pipelined architecture
    Published on 06/06/2014
    at International journal of engineering research & technology


    Hardware implementation of MPLS over ATM networks
    Published on 25/03/2013
    at National Conference on E-innovations-2013, ShrideviConference on E-innovations-2013, Shridevi Institute of Engineering and Technology,


    Implementattion of a reconfigurable architecture for 1-D and 2-D DWT on FPGA using pipelined architecture
    Published on 29/06/2014
    at International conference on information and communication engineering


    NoC implementation of AES : A Survey
    Published on 02/03/2015
    at ICACE-2015 Mysore


    NoC Implementation of AES Algorithm
    Published on 16/06/2015
    at NCEVENT-15


    speech intelligibility prediction using MFCC
    Published on 25/04/2015
    at ICETES-15


    “FPGA Based MPLS Implementation for an ATM Network”,
    Published on 14/03/2013
    at “FPGA Based MPLS Implementation for an ATM Network”,